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Summary

The ongoing trend towards reduced supply voltages of mobile and cordless systems is mainly driven by the need to implement their digital part in modern sub-micron technologies, but it introduces serious problems for the design and verification of analogue circuits. It is the strategy of this project to reduce the minimum required supply voltage of a typical analogue signal processing circuit by focusing on the design methodology of its most critical blocks.

In this way, the well-established gm-C filter technique will be optimised for low-voltage operation, new A/D- and D/A- converter concepts will be investigated and the recently developed log-domain filter technique will be brought to commercial use. This filter principle is especially well suited for low-voltage low-power applications, since it represents internal signals by instantaneously compressed voltages, while maintaining an over-all linear transfer function.

Innovative and aggressively optimised circuits require also a more profound way of design verification. Therefore, a recently developed Formal Verification Tool will be implemented in the design environment and used for checking the new designs.

For ensuring a timely return of investment, a DECT and a GSM handset were chosen as demonstrators for this project.

Objectives

New instantaneous companding filter principle;

Efficient use of the dissipated power, in particular at very low supply voltages (<1.5V);

Low-voltage voice band smoothing filters and analogue-to-digital and digital-to-analogue converters for an analogue front-end circuit of a DECT system;

High linear transconductor-capacitor (gm-C) filter for GSM Analogue Interface Circuit operating at supply voltages as low as 2.5V;

Formal verification tools, which will be implemented in the industrial partners design environment. These tools support the complete design process from system level down to transistor level.

Participants

SIEMENS AG (D), SIEMENS EZM (A), Univ. Hannover (D), EPFL (CH)

Design Story

Public Deliverables