Summary
The aim of the project is the development of a low-power
encryption/decryption circuit for data transmission systems. The
portability of these systems requires a drastic decrease of their
power consumption. The International Data Encryption Algorithm
(IDEA) was selected, which is one of the most powerful algorithms
today.
A fully asynchronous ASIC implementation of the IDEA algorithm
will be developed, which is expected to operate at frequencies up
to at least 25 Mbits/sec.
An advanced low-power design flow will be established on the
basis of commercially available CAD tools, which can be used also
for similar data processing applications. The main effort will be
spent on the algorithmic and architectural design levels, with
emphasis on asynchronous design methodology.
The reduced power consumption of the asynchronous
implementation will be demonstrated by comparison with a
synchronous version. It will be tested in two products with
different bit rate requirements. Hellenic Aerospace Industries
will use the circuits in new versions of their mobile
communication products.
The asynchronous design methodology and techniques will be
made available to other European companies.
Objectives
- Implementation of the IDEA encryption/decryption method
with drastically reduced power consumption;
- Advanced low power design flow with emphasis on algorithm
and architecture optimisations;
- Industrial demonstration of the asynchronous design
methodology based on commercial tools.
Participants
Hellenic Aerospace Industry (GR), University of Patras
(GR)
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