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lucs

lucs

				Summary The specification, development and prototyping of a low power digital frontend for medical diagnostic ultrasound equipment. The goal of the project is to develop a low power chip set allowing to build up digital frontends with the quality and functionality close to that of high-performance systems for a price required in low-cost products and a power dissipation allowing their use in battery-operated handheld ultrasound scanners. This should be realised by implementing the ADCs, the beamformer and the control in ASICs. Key technologies for this development are on-chip ADCs and dedicated low power VLSI circuits. This will lead to a key component with several ADCs, a beamformer and the necessary control on one chip. This chip will be used in a handheld ultrasound scanner (single chip solution) as well as in high-performance systems (cascaded multi-chip solution). The analog part (IMS) of the project endeavors to transfer a design methodology for high-speed low-power ADC banks, which can be rather easily customised: The goal is scalability as far as architecture, performance, and technology are concerned. The design of the proposed beamformer (EECS) chip follows a low power design methodology applied on all levels of CMOS design top from the algorithmic system level down to the physical realisation level. The full-custom design is reduced dramatically by the use of a datapath generator.     Objectives Design of LUCS chip. Design methodology on low power ADC, memory and circuit design. Low power design procedures. Introduction of datapath generator. Prototype demonstration of a handheld medical ultrasound scanner. Workshop dedicated to LUCS project and low power design. Participants Pie Medical Equipment B.V. Maastricht NL Fraunhofer-Institute, Duisberg Ge. EECS group RWTH Aachen Design Story Public Deliverables

   

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